• VLSI Design Flow
  • ASIC vs FPGA
  • RTL Design Methodologies
  • Introduction to ASIC Verification Methodologies
  • Applications of VLSI

Advanced Digital System Design

  • Introduction to Digital Electronics
  • ALU circuits
  • Data processing circuits
  • Universal Logic Elements
  • Combinational circuits – Design and Analysis
  • Latches and Flip Flops
  • Shift Registers and Counters
  • Sequential circuits – Design and Analysis
  • Memories and PLD
  • Finite State Machine


  • Introduction to VHDL
  • Applications of VHDL
  • VHDL language concepts
  • VHDL language basics and constructs
  • Levels of abstraction
  • Data types, Enumerated data types
  • VHDL operators
  • Declarations - libraries, entity, architecture
  • Data Objects - signal, variable, constant
  • Dataflow model - Concurrent assignment statements
  • Structural model - Component declarations
  • Component instantiation
  • Generate Statement, Configuration block
  • Behavioral model - Process statement, Sequential statements
  • Delay concept, Generic concept
  • Arrays, Records, Procedures, Functions
  • Memory modeling
  • FSM –structure, moore vs mealy, coding styles, registered outputs
  • Standard packages, Local and Global Declarations
  • Package, Package body
  • Writing Test Benches
  • Advanced VHDL Topics – assertions, attributes, file handling

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